00001 #ifndef prdef_h 00002 #define prdef_h 00003 00004 #define PR__ESP 1 00005 #define PR__SSP 2 00006 #define PR__USP 3 00007 #define PR__ASN 6 00008 #define PR__ASTEN 48 00009 #define PR__ASTSR 49 00010 #define PR__DATFX 23 00011 #define PR__IPIR 22 00012 #define PR__IPL 18 00013 #define PR__MCES 38 00014 #define PR__PCBB 16 00015 #define PR__PME 61 00016 #define PR__PRBR 15 00017 #define PR__SCBB 17 00018 #define PR__SIRR 20 00019 #define PR__SISR 21 00020 #define PR__TBIA 57 00021 #define PR__TBIAP 50 00022 #define PR__TBIS 58 00023 #define PR__TBIS_64 60 00024 #define PR__TBISD 59 00025 #define PR__TBISI 47 00026 #define PR__VPTB 12 00027 #define PR__SID_TYP780 1 00028 #define PR__SID_TYP750 2 00029 #define PR__SID_TYP730 3 00030 #define PR__SID_TYP790 4 00031 #define PR__SID_TYP8SS 5 00032 #define PR__SID_TYP8NN 6 00033 #define PR__SID_TYPUV1 7 00034 #define PR__SID_TYPUV2 8 00035 #define PR__SID_TYP410 8 00036 #define PR__SID_TYP009 9 00037 #define PR__SID_TYP420 10 00038 #define PR__SID_TYP520 10 00039 #define PR__SID_TYP650 10 00040 #define PR__SID_TYP9CC 10 00041 #define PR__SID_TYP9CI 10 00042 #define PR__SID_TYP60 10 00043 #define PR__SID_TYP670 11 00044 #define PR__SID_TYP9RR 11 00045 #define PR__SID_TYP43 11 00046 #define PR__SID_TYP9AQ 14 00047 #define PR__SID_TYP8PS 17 00048 #define PR__SID_TYP1202 18 00049 #define PR__SID_TYP46 18 00050 #define PR__SID_TYP600 19 00051 #define PR__SID_TYP690 19 00052 #define PR__SID_TYP700 19 00053 #define PR__SID_TYP1302 19 00054 #define PR__SID_TYP49 19 00055 #define PR__SID_TYP1303 19 00056 #define PR__SID_TYP660 20 00057 #define PR__SID_TYP440 20 00058 #define PR__SID_TYP4A 20 00059 #define PR__SID_TYP550 20 00060 #define PR__SID_TYP1701 23 00061 #define PR__SID_TYPMAX 23 00062 #define PR__SID_TYP_NOTAVAX 128 00063 #define PR__SID_TYPUV 8 00064 #define PR__XSID_UV_UV 0 00065 #define PR__XSID_UV_UV2 1 00066 #define PR__XSID_UV_410 4 00067 #define PR__SID_TYPCV 10 00068 #define PR__XSID_CV_CV 0 00069 #define PR__XSID_CV_650 1 00070 #define PR__XSID_CV_9CC 2 00071 #define PR__XSID_CV_60 3 00072 #define PR__XSID_CV_420 4 00073 #define PR__XSID_CV_9CI 5 00074 #define PR__XSID_CV_520 7 00075 #define PR__SID_TYPRV 11 00076 #define PR__XSID_RV_RV 0 00077 #define PR__XSID_RV_670 1 00078 #define PR__XSID_RV_9RR 2 00079 #define PR__XSID_RV_43 4 00080 #define PR__SID_TYPV12 18 00081 #define PR__XSID_V12_V12 0 00082 #define PR__XSID_V12_1202 2 00083 #define PR__XSID_V12_46 4 00084 #define PR__SID_TYPV13 19 00085 #define PR__XSID_V13_V13 0 00086 #define PR__XSID_V13_690 1 00087 #define PR__XSID_V13_1302 2 00088 #define PR__XSID_V13_1303 3 00089 #define PR__XSID_V13_49 4 00090 #define PR__XSID_V13_700 5 00091 #define PR__XSID_V13_600 6 00092 #define PR__SID_TYPV14 20 00093 #define PR__XSID_V14_V14 0 00094 #define PR__XSID_V14_660 1 00095 #define PR__XSID_V14_440 4 00096 #define PR__XSID_V14_4A 5 00097 #define PR__XSID_V14_550 7 00098 #define PR__SID_TYPV17 23 00099 #define PR__XSID_V17_V17 0 00100 #define PR__XSID_V17_1701 1 00101 #define PR__XSID_N8800 0 00102 #define PR__XSID_N8700 1 00103 #define PR__XSID_N2 2 00104 #define PR__XSID_N3 3 00105 #define PR__XSID_N4 4 00106 #define PR__XSID_N5 5 00107 #define PR__XSID_N8550 6 00108 #define PR__XSID_N8500 7 00109 #define PR__XSID_N8NNN -1 00110 #define PR_M_ASTEN 0xF 00111 #define PR_M_ASTEN_KEN 0x1 00112 #define PR_M_ASTEN_EEN 0x2 00113 #define PR_M_ASTEN_SEN 0x4 00114 #define PR_M_ASTEN_UEN 0x8 00115 #define PR_M_ASTEN_DSBL_ALL 0 00116 #define PR_M_ASTEN_ENBL_ALL 255 00117 #define PR_M_ASTEN_ENBL_K 17 00118 #define PR_M_ASTEN_ENBL_E 34 00119 #define PR_M_ASTEN_ENBL_S 68 00120 #define PR_M_ASTEN_ENBL_U 136 00121 #define PR_M_ASTEN_PRSRV_ALL 15 00122 #define PR_M_ASTEN_PRSRV_K 1 00123 #define PR_M_ASTEN_PRSRV_E 2 00124 #define PR_M_ASTEN_PRSRV_S 4 00125 #define PR_M_ASTEN_PRSRV_U 8 00126 #define PR_M_ASTSR 0xF 00127 #define PR_M_ASTSR_KPD 0x1 00128 #define PR_M_ASTSR_EPD 0x2 00129 #define PR_M_ASTSR_SPD 0x4 00130 #define PR_M_ASTSR_UPD 0x8 00131 #define PR_M_ASTSR_CLR_ALL 0 00132 #define PR_M_ASTSR_SET_ALL 255 00133 #define PR_M_ASTSR_SET_K 17 00134 #define PR_M_ASTSR_SET_E 34 00135 #define PR_M_ASTSR_SET_S 68 00136 #define PR_M_ASTSR_SET_U 136 00137 #define PR_M_ASTSR_PRSRV_ALL 15 00138 #define PR_M_ASTSR_PRSRV_K 1 00139 #define PR_M_ASTSR_PRSRV_E 2 00140 #define PR_M_ASTSR_PRSRV_S 4 00141 #define PR_M_ASTSR_PRSRV_U 8 00142 #define PR_M_FEN_FEN 0x1 00143 #define PR_M_DATFX_DATFX 0x1 00144 #define PR_M_IPL_IPL 0x1F 00145 #define PR_M_MCES_MCK 0x1 00146 #define PR_M_MCES_SCE 0x2 00147 #define PR_M_MCES_PCE 0x4 00148 #define PR_M_MCES_DPC 0x8 00149 #define PR_M_MCES_DSC 0x10 00150 #define PR_V_PCBB_PA 0 00151 #define PR_S_PCBB_PA 48 00152 #define PR_M_PS_SW 0x3 00153 #define PR_M_PS_PRVMOD 0x3 00154 #define PR_M_PS_SYSSTATE 0x4 00155 #define PR_M_PS_CURMOD 0x18 00156 #define PR_M_PS_VMM 0x80 00157 #define PR_M_PS_IPL 0x1F00 00158 #define PR_M_PS_MBZ_62 0x4000000000000000 00159 #define PR_M_PS_MBZ_63 0x8000000000000000 00160 #define PR_V_PS_MAX_PS_REG_BIT 13 00161 #define PR_C_PS_KERNEL 0 00162 #define PR_C_PS_EXEC 1 00163 #define PR_C_PS_SUPER 2 00164 #define PR_C_PS_USER 3 00165 #define PR_M_PTBR_PFN 0xFFFFFFFF 00166 #define PR_M_SCBB_PFN 0xFFFFFFFF 00167 #define PR_M_SIRR_LVL 0xF 00168 #define PR_M_SISR_SUMMARY 0xFFFF 00169 #define PR_M_SISR_RAZ 0x1 00170 #define PR_M_SISR_IR1 0x2 00171 #define PR_M_SISR_IR2 0x4 00172 #define PR_M_SISR_IR3 0x8 00173 #define PR_M_SISR_IR4 0x10 00174 #define PR_M_SISR_IR5 0x20 00175 #define PR_M_SISR_IR6 0x40 00176 #define PR_M_SISR_IR7 0x80 00177 #define PR_M_SISR_IR8 0x100 00178 #define PR_M_SISR_IR9 0x200 00179 #define PR_M_SISR_IR10 0x400 00180 #define PR_M_SISR_IR11 0x800 00181 #define PR_M_SISR_IR12 0x1000 00182 #define PR_M_SISR_IR13 0x2000 00183 #define PR_M_SISR_IR14 0x4000 00184 #define PR_M_SISR_IR15 0x8000 00185 #define PR_M_TBCHK_VA_PRESENT 0x1 00186 #define PR_M_IEEE_DNOD 0x800000000000 00187 #define PR_M_IEEE_DNZ 0x1000000000000 00188 #define PR_M_IEEE_INVD 0x2000000000000 00189 #define PR_M_IEEE_DZED 0x4000000000000 00190 #define PR_M_IEEE_OVFD 0x8000000000000 00191 #define PR_M_IEEE_INV 0x10000000000000 00192 #define PR_M_IEEE_DZE 0x20000000000000 00193 #define PR_M_IEEE_OVF 0x40000000000000 00194 #define PR_M_IEEE_UNF 0x80000000000000 00195 #define PR_M_IEEE_INE 0x100000000000000 00196 #define PR_M_IEEE_IOV 0x200000000000000 00197 #define PR_M_IEEE_UNDZ 0x1000000000000000 00198 #define PR_M_IEEE_UNFD 0x2000000000000000 00199 #define PR_M_IEEE_INED 0x4000000000000000 00200 #define PR_M_IEEE_SUMMARY 0x8000000000000000 00201 00202 union _prdef { 00203 unsigned long long pr_q_quad_access; 00204 unsigned int pr_l_long_access [2]; 00205 struct { 00206 unsigned pr_v_sid_sn : 12; 00207 unsigned pr_v_sid_pl : 3; 00208 unsigned pr_v_sid_eco : 9; 00209 unsigned pr_v_sid_type : 8; 00210 }; 00211 struct { 00212 unsigned pr_v_fill_xsid_bits : 24; 00213 unsigned pr_v_xsid_type : 8; 00214 }; 00215 union { 00216 unsigned pr_v_asten : 4; 00217 struct { 00218 unsigned pr_v_asten_ken : 1; 00219 unsigned pr_v_asten_een : 1; 00220 unsigned pr_v_asten_sen : 1; 00221 unsigned pr_v_asten_uen : 1; 00222 unsigned pr_v_fill_65_ : 4; 00223 }; 00224 }; 00225 union { 00226 unsigned pr_v_astsr : 4; 00227 struct { 00228 unsigned pr_v_astsr_kpd : 1; 00229 unsigned pr_v_astsr_epd : 1; 00230 unsigned pr_v_astsr_spd : 1; 00231 unsigned pr_v_astsr_upd : 1; 00232 unsigned pr_v_fill_66_ : 4; 00233 }; 00234 }; 00235 unsigned pr_v_fen_fen : 1; 00236 unsigned pr_v_datfx_datfx : 1; 00237 unsigned pr_v_ipl_ipl : 5; 00238 struct { 00239 unsigned pr_v_mces_mck : 1; 00240 unsigned pr_v_mces_sce : 1; 00241 unsigned pr_v_mces_pce : 1; 00242 unsigned pr_v_mces_dpc : 1; 00243 unsigned pr_v_mces_dsc : 1; 00244 unsigned pr_v_fill_67_ : 3; 00245 }; 00246 00247 struct { 00248 unsigned pr_v_ps_sw : 2; 00249 unsigned pr_v_fill_68_ : 6; 00250 }; 00251 struct { 00252 unsigned pr_v_ps_prvmod : 2; 00253 unsigned pr_v_ps_sysstate : 1; 00254 unsigned pr_v_ps_curmod : 2; 00255 unsigned psdef_$_ps_fill_1 : 2; 00256 unsigned pr_v_ps_vmm : 1; 00257 unsigned pr_v_ps_ipl : 5; 00258 unsigned psdef_$_ps_fill_2 : 20; 00259 unsigned psdef_$_ps_fill_3 : 23; 00260 unsigned pr_v_ps_sp_align : 6; 00261 unsigned pr_v_ps_mbz_62 : 1; 00262 unsigned pr_v_ps_mbz_63 : 1; 00263 }; 00264 unsigned pr_v_ptbr_pfn : 32; 00265 unsigned pr_v_scbb_pfn : 32; 00266 unsigned pr_v_sirr_lvl : 4; 00267 union { 00268 unsigned pr_v_sisr_summary : 16; 00269 struct { 00270 unsigned pr_v_sisr_raz : 1; 00271 unsigned pr_v_sisr_ir1 : 1; 00272 unsigned pr_v_sisr_ir2 : 1; 00273 unsigned pr_v_sisr_ir3 : 1; 00274 unsigned pr_v_sisr_ir4 : 1; 00275 unsigned pr_v_sisr_ir5 : 1; 00276 unsigned pr_v_sisr_ir6 : 1; 00277 unsigned pr_v_sisr_ir7 : 1; 00278 unsigned pr_v_sisr_ir8 : 1; 00279 unsigned pr_v_sisr_ir9 : 1; 00280 unsigned pr_v_sisr_ir10 : 1; 00281 unsigned pr_v_sisr_ir11 : 1; 00282 unsigned pr_v_sisr_ir12 : 1; 00283 unsigned pr_v_sisr_ir13 : 1; 00284 unsigned pr_v_sisr_ir14 : 1; 00285 unsigned pr_v_sisr_ir15 : 1; 00286 }; 00287 }; 00288 struct { 00289 unsigned pr_v_tbchk_va_present : 1; 00290 unsigned pr_v_fill_1 : 31; 00291 unsigned pr_v_fill_2 : 31; 00292 unsigned pr_v_tbchk_no_tbchk : 1; 00293 }; 00294 struct { 00295 unsigned pr_v_fpcr_fill_1 : 32; 00296 unsigned pr_v_fpcr_fill_2 : 15; 00297 unsigned pr_v_ieee_dnod : 1; 00298 unsigned pr_v_ieee_dnz : 1; 00299 unsigned pr_v_ieee_invd : 1; 00300 unsigned pr_v_ieee_dzed : 1; 00301 unsigned pr_v_ieee_ovfd : 1; 00302 unsigned pr_v_ieee_inv : 1; 00303 unsigned pr_v_ieee_dze : 1; 00304 unsigned pr_v_ieee_ovf : 1; 00305 unsigned pr_v_ieee_unf : 1; 00306 unsigned pr_v_ieee_ine : 1; 00307 unsigned pr_v_ieee_iov : 1; 00308 unsigned pr_v_ieee_dyn_rnd : 2; 00309 unsigned pr_v_ieee_undz : 1; 00310 unsigned pr_v_ieee_unfd : 1; 00311 unsigned pr_v_ieee_ined : 1; 00312 unsigned pr_v_ieee_summary : 1; 00313 }; 00314 }; 00315 00316 #endif 00317 00318
1.5.5