00001 #ifndef xmdef_h 00002 #define xmdef_h 00003 00004 #define XM_M_CHR_MOP 0x1 00005 #define XM_M_CHR_LOOPB 0x2 00006 #define XM_M_CHR_HDPLX 0x4 00007 #define XM_M_CHR_SLAVE 0x8 00008 #define XM_M_CHR_MBX 0x10 00009 #define XM_M_CHR_DMC 0x20 00010 #define XM_M_CHR_CTRL 0x40 00011 #define XM_M_CHR_TRIB 0x80 00012 #define XM_M_STS_DCHK 0x100 00013 #define XM_M_STS_TIMO 0x200 00014 #define XM_M_STS_ORUN 0x400 00015 #define XM_M_STS_ACTIVE 0x800 00016 #define XM_M_STS_BUFFAIL 0x1000 00017 #define XM_M_STS_RUNNING 0x2000 00018 #define XM_M_STS_DISC 0x4000 00019 #define XM_M_ERR_FATAL 0x10000 00020 #define XM_M_ERR_MAINT 0x80000 00021 #define XM_M_ERR_LOST 0x100000 00022 #define XM_M_ERR_THRESH 0x200000 00023 #define XM_M_ERR_TRIB 0x400000 00024 #define XM_M_ERR_START 0x800000 00025 #define XM_M_MDM_RTSHLD 0x1 00026 #define XM_M_MDM_STNDBY 0x2 00027 #define XM_M_MDM_MAINT2 0x4 00028 #define XM_M_MDM_MAINT1 0x8 00029 #define XM_M_MDM_FREQ 0x20 00030 #define XM_M_MDM_RDY 0x40 00031 #define XM_M_MDM_POLL 0x80 00032 #define XM_M_MDM_SELM 0x100 00033 #define XM_M_MDM_INT 0x800 00034 #define XM_M_MDM_V35 0x1000 00035 #define XM_M_MDM_RS232 0x4000 00036 #define XM_M_MDM_RS422 0x8000 00037 #define XM_M_MDM_CARRDET 0x1 00038 #define XM_M_MDM_MSTNDBY 0x2 00039 #define XM_M_MDM_CTS 0x4 00040 #define XM_M_MDM_DSR 0x8 00041 #define XM_M_MDM_HDX 0x10 00042 #define XM_M_MDM_RTS 0x20 00043 #define XM_M_MDM_DTR 0x40 00044 #define XM_M_MDM_RING 0x80 00045 #define XM_M_MDM_CHRMOD 0x100 00046 #define XM_M_MDM_MCLOCK 0x200 00047 #define XM_M_MDM_MODTEST 0x400 00048 #define XM_M_MDM_SIGQUAL 0x4000 00049 #define XM_M_MDM_SIGRATE 0x8000 00050 00051 struct _xmdev { 00052 unsigned char xmdev_b_p1_class; 00053 unsigned char xmdev_b_p1_type; 00054 unsigned short int xmdev_w_p1_mms; 00055 unsigned char xmdev_b_p1_char; 00056 unsigned char xmdev_b_p1_sts; 00057 unsigned char xmdev_b_p1_esum; 00058 unsigned char xmdev_b_p1_tpi; 00059 }; 00060 00061 union _xmdef { 00062 struct { 00063 unsigned xm_v_chr_mop : 1; 00064 unsigned xm_v_chr_loopb : 1; 00065 unsigned xm_v_chr_hdplx : 1; 00066 unsigned xm_v_chr_slave : 1; 00067 unsigned xm_v_chr_mbx : 1; 00068 unsigned xm_v_chr_dmc : 1; 00069 unsigned xm_v_chr_ctrl : 1; 00070 unsigned xm_v_chr_trib : 1; 00071 unsigned xm_v_sts_dchk : 1; 00072 unsigned xm_v_sts_timo : 1; 00073 unsigned xm_v_sts_orun : 1; 00074 unsigned xm_v_sts_active : 1; 00075 unsigned xm_v_sts_buffail : 1; 00076 unsigned xm_v_sts_running : 1; 00077 unsigned xm_v_sts_disc : 1; 00078 unsigned xmdef_$_fill_1 : 1; 00079 unsigned xm_v_err_fatal : 1; 00080 unsigned xmdef_$_fill_2 : 2; 00081 unsigned xm_v_err_maint : 1; 00082 unsigned xm_v_err_lost : 1; 00083 unsigned xm_v_err_thresh : 1; 00084 unsigned xm_v_err_trib : 1; 00085 unsigned xm_v_err_start : 1; 00086 }; 00087 struct { 00088 unsigned xm_v_mdm_rtshld : 1; 00089 unsigned xm_v_mdm_stndby : 1; 00090 unsigned xm_v_mdm_maint2 : 1; 00091 unsigned xm_v_mdm_maint1 : 1; 00092 unsigned xmdef_$_fill_3 : 1; 00093 unsigned xm_v_mdm_freq : 1; 00094 unsigned xm_v_mdm_rdy : 1; 00095 unsigned xm_v_mdm_poll : 1; 00096 unsigned xm_v_mdm_selm : 1; 00097 unsigned xmdef_$_fill_4 : 2; 00098 unsigned xm_v_mdm_int : 1; 00099 unsigned xm_v_mdm_v35 : 1; 00100 unsigned xmdef_$_fill_5 : 1; 00101 unsigned xm_v_mdm_rs232 : 1; 00102 unsigned xm_v_mdm_rs422 : 1; 00103 }; 00104 struct { 00105 unsigned xm_v_mdm_carrdet : 1; 00106 unsigned xm_v_mdm_mstndby : 1; 00107 unsigned xm_v_mdm_cts : 1; 00108 unsigned xm_v_mdm_dsr : 1; 00109 unsigned xm_v_mdm_hdx : 1; 00110 unsigned xm_v_mdm_rts : 1; 00111 unsigned xm_v_mdm_dtr : 1; 00112 unsigned xm_v_mdm_ring : 1; 00113 unsigned xm_v_mdm_chrmod : 1; 00114 unsigned xm_v_mdm_mclock : 1; 00115 unsigned xm_v_mdm_modtest : 1; 00116 unsigned xmdef_$_fill_6 : 3; 00117 unsigned xm_v_mdm_sigqual : 1; 00118 unsigned xm_v_mdm_sigrate : 1; 00119 }; 00120 }; 00121 00122 #endif 00123 00124
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